1. Field of the Invention
The present invention relates to methods for virtually embedding and/or de-embedding balanced networks when, for example, making measurements using a vector network analyzer (VNA).
2. Description of the Related Art
Measurements of a device under test (DUT) using a VNA may not always be performed in a desired test environment. This is because it may be too time intensive and/or costly to measure a DUT in a desired test environment. Accordingly, a DUT is often measured in a different environment for reasons of expediency and/or practicality, thereby requiring the use of embedding or de-embedding techniques to correct the effects of the test environment. For example, a DUT may be in a test fixture or connected via wafer probes when measurements of the DUT are made, thereby requiring the removal of the effects of the fixture or probes from the measured data for a truer picture of actual DUT performance. De-embedding techniques allows this task (i.e., removal of effects) to be performed computationally. This concept is shown in FIG. 1A. In another example, a customer may desire to see what the performance of a DUT would be with a specific matching network attached. However it may be impractical to attach the matching network during manufacturing for cost reasons. Embedding techniques allow this task (i.e., attaching the matching network) to be performed computationally. This concept is shown in FIG. 1B.
For two port devices, a chain matrix or cascading computation using transfer matrices has been used to perform embedding and de-embedding. The concept is to re-arrange standard scattering-parameters (S-parameters) to form a pair of new matrices (termed T for transfer matrices) that can be multiplied for embedding and form the equivalent to the networks being concatenated or cascaded (i.e., one network being embedded). Multiplying by the inverse of the T-matrix (i.e., Txe2x88x921) is the equivalent of de-embedding. A key-point is that the outputs from one stage map directly to the inputs of the next stage thereby allowing the matrix multiplication to make sense.
Transfer-matrices (also known to as transmission matrices) are made up of T-parameters (also known as chain-scattering-parameters and scattering-transfer-parameters) that are defined in a manner analogous to S-parameters except the dependencies have been switched to enable the cascading discussed above. In both cases the wave variables are defined as ai for the wave incident on port i, and bi for the wave returning from port i. S-parameters of an n-port device characterize how the device interacts with signals presented to the various ports of the device. An exemplary S-parameter is xe2x80x9cS12.xe2x80x9d The first subscript number is the port that the signal is leaving, while the second is the port that the signal is being injected into. S12, therefore, is the signal leaving port 1 relative to the signal being injected into port 2. Referring to FIG. 2, the incident and returning waves and the S-parameters are shown for an exemplary two port network 202. These S-parameters are defined by Equation 1 below.                               [                                                                      b                  1                                                                                                      b                  2                                                              ]                =                              [                                                                                S                    11                                                                                        S                    12                                                                                                                    S                    21                                                                                        S                    22                                                                        ]                    ⁡                      [                                                                                a                    1                                                                                                                    a                    2                                                                        ]                                              (                  Equation          ⁢                      xe2x80x83                    ⁢          1                )            
where,
a1 is the traveling wave incident on port 1;
a2 is the traveling wave incident on port 2;
b1 is the traveling wave reflected from port 1;
b2 is the traveling wave reflected from port 2;
S11 is referred to as the xe2x80x9cforward reflectionxe2x80x9d coefficient, which is the signal leaving port 1 relative to the signal being injected into port 1;
S21 is referred to as the xe2x80x9cforward transmissionxe2x80x9d coefficient, which is the signal leaving port 2 relative to the signal being injected into port 1;
S22 is referred to as the xe2x80x9creverse reflectionxe2x80x9d coefficient, which is the signal leaving port 2 relative to the signal being injected into port 2; and
S12 is referred to as the xe2x80x9creverse transmissionxe2x80x9d coefficient, which is the signal leaving port 1 relative to the signal being injected into port 2.
(Note that the set of S-parameters S11, S12, S21, S22 make up an S-matrix)
The T-formulation is a bit different to allow for cascading. More specifically, in the T-formulation, b2 and a2 are independent parameters rather than a1 and a2 (as in the S-formulation of Equation 1). This does not change the operation of the circuit, just the situation under which the parameters are measured. Since T-parameters are rarely measured directly, this is usually not a concern. For a two port network, the T-parameters are defined in Equation 2 shown below.                               [                                                                      a                  1                                                                                                      b                  1                                                              ]                =                              [                                                                                T                    11                                                                                        T                    12                                                                                                                    T                    21                                                                                        T                    22                                                                        ]                    ⁡                      [                                                                                b                    2                                                                                                                    a                    2                                                                        ]                                              (                  Equation          ⁢                      xe2x80x83                    ⁢          2                )            
Two cascaded two-port networks 302 and 304 are shown in FIG. 3. Note the arrangement is such that when two networks are connected together, b2 of network 302 at the left maps directly onto a1 for network 304 on the right. Similarly, a2 for network 302 on the left maps directly onto b1 for network 304 on the right.
The equations for computing the T-parameters in terms of the S-parameters (and vice versa) can be mathematically derived. The results are shown below in Equations 3 and 4.                               [                                                                      T                  11                                                                              T                  12                                                                                                      T                  21                                                                              T                  22                                                              ]                =                              1                          S              21                                ⁡                      [                                                            1                                                                      -                                          S                      22                                                                                                                                        S                    11                                                                                                                                      S                        21                                            ⁢                                              S                        12                                                              -                                                                  S                        11                                            ⁢                                              S                        22                                                                                                                  ]                                              (                  Equation          ⁢                      xe2x80x83                    ⁢          3                )                                          [                                                                      S                  11                                                                              S                  12                                                                                                      S                  21                                                                              S                  22                                                              ]                =                              1                          T              11                                ⁡                      [                                                                                T                    21                                                                                                                                      T                        11                                            ⁢                                              T                        22                                                              -                                                                  T                        21                                            ⁢                                              T                        12                                                                                                                                          1                                                                      -                                          T                      12                                                                                            ]                                              (                  Equation          ⁢                      xe2x80x83                    ⁢          4                )            
To extend this methodology, consider an N-port DUT where the networks to be added or subtracted are still two ports. A simple extension for N-port embedding/de-embedding is shown in FIG. 4, which illustrates a six-port DUT 402 (i.e., N=6). Computationally, measurements for a six-port DUT 402 have conventionally been handled by treating the calibration coefficients associated with each port as a network and then multiplying the T-matrix for the xe2x80x9cnetworkxe2x80x9d of the DUT with the T (or Txe2x88x921) matrices for xe2x80x9cnetworksxe2x80x9d 1-6 shown in FIG. 2. By reducing an N-port problem to a two-port concatination problem, the above discussed methodology has typically been adequate.
Recently, however, many circuits are being designed as balanced circuits. A balanced circuit, as defined herein, is a circuit that includes a pair of ports that are driven as a pair, with neither port of the pair being connected to ground. Examples of balanced circuits are circuits that have differential or common mode inputs. A balanced circuit need not be completely symmetrical. Balanced circuits have often been used in the pursuit of lower power consumption, smaller size, better electromagnetic interference (EMI) behavior and lower cost. This is especially true for consumer electronics. The behavior of the class of balanced devices are illustrated in FIGS. 5A-5D. In these FIGS., a four-port device 502 is treated as two pairs of ports (i.e., ports 1 and 2 making up one pair, and ports 3 and 4 making up another pair), where each pair may be driven either differentially or common mode. The outputs can also be measured in a differential or common-mode sense. FIG. 5A illustrates a common-mode (i.e., in-phase) input and a common mode output. FIG. 5B illustrates a common mode input and a differential (i.e., 180 degrees out of phase) output. FIG. 5C illustrates a differential input and a common mode output. FIG. 5D illustrates a differential input and a differential output.
While the methodology discussed with reference to FIG. 4 can be used for fixture de-embedding and certain other operations, there are occasions when this methodology is not adequate. FIG. 6 shows one example where a four-port matching network 602 that has different behaviors for differential and common-mode signals. Accordingly, such a balanced matching network 602 cannot be well represented by a two-port network. That is, the embedding of such a structure cannot be done using a simple two-port network. For example, if the matching network of FIG. 6 were broken down into two single ended networks (each with L/2 to ground), the common mode behavior of the actual matching network would not be simulated correctly. An example of this is illustrated in FIG. 7, which shows a graph having frequency along its horizontal axis and decibels (dB) along its vertical axis. Referring to FIG. 7, plotted line 702 illustrates the frequency response for network 602 when a differential input is applied, and plotted line 704 illustrates the frequency response of network 602 when a common mode input is applied. As can be seen from FIG. 7, network 602 has a different response for a differential input and a common mode input.
FIG. 8, which illustrates a circuit diagram 802 showing the differential equivalent of the circuit of FIG. 6, is useful for understanding why a simple breakdown into two port networks cannot be done. FIGS. 6 and 8 shall first be looked at when differential signals are applied. As can be appreciated looking at FIG. 8, when a differential drive is applied significant current will flow through each inductor L/2 to the virtual ground, thus substantially affecting the impedance seen at the ports. This would be expected from FIG. 6. However, looking at FIG. 6, if the drive was common-mode (i.e., in-phase) there should be no inductor current since the two inductor nodes will be at the same potential. If the voltage sources in FIG. 8 are however changed to both being +V (to represent common-mode), this circuit will still show massive inductor current flow indicating that this equivalent circuit is only valid for the differential drive condition. Accordingly, a four-port balanced circuit cannot be broken down into a pair of two-port circuits that provides equivalents in all cases.
While strict wave nodal analysis of balanced circuits maybe possible when two-port circuits do not provide equivalents, it may not be efficient for embedded and de-embedded system implementations. Accordingly, there is a need for an efficient method for embedding and de-embedding balanced circuits.
Embedding and de-embedding techniques have been existence for a number of years. However, the increasing importance of balanced and differential circuit design have produced a need for a change to the practice. This is because conventional embedding and de-embedding techniques have treated networks as two ports that can be added to or subtracted from any of the ports of the DUT. However, with balanced devices, the conventional techniques are not adequate since the ports of the DUT must often be considered two-at-a-time. The present invention provides a computational approach to embedding and de-embedding that more accurately simulates the behavior of balanced devices.
In accordance with the present invention, a method is provided for virtually embedding or de-embedding one or more balanced four-port networks from/into a four-port device under test (DUT). This method includes the steps of acquiring a set of scattering-parameters for the DUT and then generating a transfer-matrix for the DUT based on the set of scattering-parameters for the DUT. A set of scattering-parameters for each of the one or more balanced four-port networks to be embedded or de-embedded is also acquired. A corresponding transfer-matrix is then generated for each of the one or more balanced four-port networks that is to be embedded/de-embedded into/from the DUT, each transfer-matrix being generated based on the corresponding set of acquired scattering-parameters. The transfer-matrix for the DUT is then multiplied with the transfer-matrix associated with each balanced network to be embedded or with the inverse the transfer-matrix associated with each network to be de-embedded, to thereby produce a composite transfer-matrix. Finally, a set of composite scattering-parameters is then generated based on the composite transfer-matrix. The set of composite scattering-parameters is representative of the DUT with the one or more balanced four-port networks embedded/de-embedded into/from it.
Another embodiment of the present invention is directed to a method of both embedding one or more balanced four-port networks into a four-port DUT and de-embedding one or more further balanced four-port networks from the four-port DUT.
Further embodiments of the present invention are directed to methods for embedding/de-embedding balanced four-port networks into/from a DUT having more than four-ports. A specific embodiment is directed to a method for virtually embedding one or more balanced four-port networks into a 4k-port device under test (DUT), where k is an integerxe2x89xa72. This method includes the steps of acquiring a set of scattering-parameters for the DUT and generating a transfer-matrix for the DUT based on the set of scattering-parameters for the DUT. A a set of scattering-parameters is also acquired for each of the one or more balanced four-port networks to be embedded into the DUT. Next, a corresponding dummy transfer-matrix is generated for each of the one or more balanced four-port networks that is to be embedded into the DUT. Each dummy transfer-matrix is a 4kxc3x974k matrix generated based on the corresponding set of acquired scattering-parameters. This enables the transfer-matrix for the DUT to be multiplied with the one or more dummy transfer-matrices to thereby produce a composite transfer-matrix. Finally, a set of composite scattering-parameters is generated based on the composite transfer-matrix. The set of composite scattering-parameters is representative of the 4k-port network with the one or more balanced four-port networks embedded into it. If one or more balanced four-port networks were to be de-embedded from the 4k-port DUT, then the transfer matrix for the DUT is multiplied with inverses of the dummy transfer-matrix generated for each of the one or more balanced four-port networks to be de-embedded.
Additional features and advantages of the present invention, as well as the operation of various embodiments of the present invention, are described in detail below with reference to the accompanying drawings.